Edge computing and semiconductor fabrication are the hardware base on which every modern digital service — 5G, AI, IoT, autonomous vehicles, defence systems — runs. For two decades, India had neither a domestic fab nor a world-class design and packaging footprint. The India Semiconductor Mission (ISM, 2021) and parallel reforms have started changing that. For UPSC, this sits squarely in GS Paper III — Science & Technology, Economy, Internal Security.
What is edge computing?
Edge computing is a distributed computing paradigm that processes data close to where it is generated — on-device, on-premise or at a nearby network edge — rather than sending it to a centralised cloud.
Why edge?
| Reason | Detail |
|---|---|
| Latency | Milliseconds matter in autonomous vehicles, tele-surgery, AR/VR, industrial robotics |
| Bandwidth | Edge pre-processes sensor data, reducing cloud transmission costs |
| Privacy | Sensitive data (health, biometrics) processed locally |
| Resilience | Works under intermittent connectivity |
| Energy | Offloads from power-hungry hyperscale data centres |
Edge-cloud continuum
Workloads split across:
- Device edge — smartphone, vehicle, sensor.
- On-premise edge — factory, hospital, store.
- Network edge — telco base stations (5G MEC).
- Regional edge — metro data centres.
- Public cloud — hyperscalers (AWS, Azure, GCP).
Enabling technologies
- 5G MEC (Multi-access Edge Computing) — compute co-located with telecom networks.
- AI accelerators — NVIDIA Jetson, Google Coral, Qualcomm NPU for inference at edge.
- Containers and orchestration — Kubernetes, KubeEdge, Azure IoT Edge.
- Digital twins — real-time simulations of physical assets.
Applications
| Sector | Edge use case |
|---|---|
| Manufacturing | Predictive maintenance, robotics, computer vision QA |
| Healthcare | Real-time imaging, wearables, tele-surgery |
| Agriculture | Soil/weather sensors, drone spraying |
| Retail | In-store analytics, contactless payments |
| Automotive | ADAS, infotainment, V2X |
| Smart cities | Traffic, surveillance, waste management |
| Energy & utilities | Smart grid, leak detection |
| Defence | Battlefield AI, secure tactical edge |
The semiconductor stack
A modern chip's journey:
- EDA tools & IP — Synopsys, Cadence, Arm, RISC-V.
- Chip design — architecture, RTL, verification.
- Fabrication (fab) — front-end wafer processing at 28 nm down to 3 nm.
- Assembly, Testing, Marking and Packaging (ATMP/OSAT) — back-end.
- Advanced packaging — 2.5D/3D, chiplets, HBM.
- System integration — boards, modules, end products.
Who does what globally
| Step | Leaders |
|---|---|
| EDA tools | USA (Synopsys, Cadence, Siemens) |
| IP cores | UK (Arm), USA (Cadence, Synopsys) |
| Fab (advanced nodes) | Taiwan (TSMC), South Korea (Samsung), USA (Intel) |
| Fab (mature nodes) | China, Taiwan, Japan, Korea, Europe |
| Memory | South Korea (Samsung, SK Hynix), USA (Micron) |
| ATMP/OSAT | China, Malaysia, Vietnam, Philippines |
| Equipment | Netherlands (ASML), Japan (Tokyo Electron), USA |
India's strengths and gaps (before ISM)
Strengths
- 20% of the world's chip design talent sits in India.
- Global Capability Centres of TI, Intel, NVIDIA, Qualcomm, AMD, Samsung, Broadcom in Bengaluru, Hyderabad, NOIDA.
- Advanced research through C-DAC, SCL Mohali, ISRO-SAC, IIT Madras Shakti RISC-V.
Gaps
- No operating commercial fab; SCL Mohali (180 nm) is a small, strategic fab.
- Little OSAT/ATMP footprint.
- Limited materials & chemicals ecosystem.
India Semiconductor Mission (ISM)
Approved in December 2021 with Rs 76,000 crore outlay, implemented under MeitY via India Semiconductor Mission (a division of Digital India Corporation). Total commitments, including 2024 top-up, exceed Rs 91,000 crore by 2025.
ISM schemes
| Scheme | What it funds |
|---|---|
| Semiconductor Fab | 50% of project cost (pari passu) for fabs |
| Display Fab | 50% of project cost for displays |
| Compound Semi / Silicon Photonics / Sensors / ATMP / OSAT | 50% of project cost |
| Design-Linked Incentive (DLI) | Up to 50% + 6-8% net sales reward for Indian chip design |
| SPECS | 25% incentive on capex for components & sub-assemblies |
Approved fabs and ATMP units (by 2025)
| Project | Partner | Location | Node | Investment |
|---|---|---|---|---|
| Tata Electronics + PSMC | Taiwan | Dholera, Gujarat | 28 nm / 50 nm / 110 nm | Rs 91,000 cr |
| Tata ATMP | — | Jagiroad, Assam | Advanced packaging | Rs 27,000 cr |
| Micron ATMP | USA | Sanand, Gujarat | DRAM/NAND packaging | Rs 22,500 cr |
| CG Power + Renesas + Stars | Japan/Thailand | Sanand, Gujarat | ATMP | Rs 7,600 cr |
| Kaynes Semicon | India | Sanand, Gujarat | ATMP | Rs 3,300 cr |
| SCL Mohali modernisation | DAE | Mohali | Up to 28 nm | Announced Budget 2024-25 |
| Tower Semiconductor | Israel/Adani | Panvel, Maharashtra | Mature nodes | Rs 83,000 cr (approved in principle) |
First chips from Micron Sanand began shipping in late 2025; Tata-PSMC Dholera targets production by late 2026.
Complementary policies
- National Policy on Electronics, 2019 — USD 400 billion electronics goal by 2025-26.
- PLI for Semiconductors & Display Fabs (2021) — integrated with ISM.
- PLI for Large-Scale Electronics (mobiles) — ~Rs 41,000 crore scheme; iPhone assembly localisation booster.
- Chips to Startups (C2S) — training 85,000 chip-design engineers at 100 institutes.
- India AI Compute — public AI GPU cluster complementing ISM.
- Shakti & VEGA — indigenous RISC-V processors at IIT Madras & C-DAC.
International partnerships
- India-US iCET (2023) — semiconductor fab supply chain and talent.
- Quad Semiconductors Supply Chain Resilience (2021-).
- India-Japan, India-Korea, India-Taiwan, India-Netherlands technical partnerships.
- India-EU Trade and Technology Council (TTC) — semiconductor working group.
Challenges
| Challenge | Detail |
|---|---|
| Water & power | Advanced fabs need 5-10 million litres/day and uninterrupted power |
| Talent pipeline | Mature-node fab technicians, ATMP engineers in short supply |
| Materials ecosystem | High-purity gases, photoresists, specialty chemicals |
| Capex recovery | Mature-node price wars with China |
| Export controls | US/Japan/Netherlands curbs on advanced equipment to China affect supply chain |
| Geopolitics | Taiwan Strait risk concentrates world's leading-edge fabs |
Latest developments (2024-26)
- Micron Sanand — first Indian-packaged DRAM chips rolled out Dec 2025.
- Tata-PSMC Dholera — milestone construction underway; expected first silicon 2026-27.
- Union Budget 2024-25 — additional allocation for ISM, SPECS and C2S.
- AI Action Summit, Paris (Feb 2025) — India pitched semiconductor-AI stack bid.
- DeepTech Policy 2024 — semiconductor design startups prioritised.
- National Quantum Mission (2024) — quantum chip design complements conventional fabs.
- Chandrayaan-4 plan and Gaganyaan progress — rad-hard semiconductors for space require ISM capabilities.
- Bharat 6G Alliance — edge AI + semiconductor stack for 6G.
- Tower-Adani fab approval-in-principle (2024).
- Shakti RISC-V taped out at 28 nm in SCL Mohali (2024).
- RISC-V International — India increased participation at board level.
- Delhi-Karnataka-Andhra-Tamil Nadu state semicon policies attracting OSAT investment.
UPSC Relevance
GS Paper III — Science & Technology
- Edge computing, semiconductor value chain, ISM.
GS Paper III — Economy
- PLI, DLI, FDI, electronics exports, employment.
GS Paper III — Internal Security
- Supply chain security, critical tech export controls, rad-hard chips.
GS Paper II — International Relations
- Quad, iCET, TTC, Taiwan-linked chip security.
Prelims pointers — ISM year (2021), Rs 76,000 crore outlay, Dholera/Sanand/Jagiroad fab locations, DLI, SPECS, C2S, Shakti processor, RISC-V, 5G MEC.
Interview probes — feasibility of competing at cutting-edge nodes; water-power siting; talent pipeline; iCET critical tech priorities; role of RISC-V.
Semiconductors are the oil of the 21st century — but unlike oil, they are made, not found. India's ISM marks a first credible attempt to build a sovereign chip value chain alongside its AI and 5G ambitions.
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